Over the last few decades, the electronics industry has undergone a revolution by the use of semiconductor technology to fabricate small, highly integrated electronic devices. The most common and important semiconductor technology presently used is silicon-based. A large variety of semiconductor devices have been manufactured having various applications in numerous disciplines. One such silicon-based semiconductor device is a metal-oxide-semiconductor (MOS) transistor.
The principal elements of a typical MOS semiconductor device are illustrated in FIG. 1. The device generally includes a semiconductor substrate 101 on which a gate electrode 103 is disposed. The gate electrode 103 acts as a conductor. An input signal is typically applied to the gate electrode 103 via a gate terminal (not shown). Heavily-doped source/drain regions 105 are formed in the semiconductor substrate 101 and are connected to source/drain terminals (not shown). As illustrated in FIG. 1, the typical MOS transistor is symmetrical, which means that the source and drain are interchangeable. Whether a region acts as a source or drain depends on the respective applied voltages and the type of device being made (e.g., PMOS, NMOS, etc.). Thus, as used herein, the term source/drain region refers generally to an active region used for the formation of a source or drain.
A channel region 107 is formed in the semiconductor substrate 101 beneath the gate electrode 103 and separates the source/drain regions 105. The channel region 107 is typically lightly doped with a dopant of a type opposite to that of the source/drain regions 105. In addition, the channel may be doped with a voltage threshold implant to alter the characteristics of the channel region. A punchthrough region may also be formed beneath the channel region 107 to prevent or reduce current leakage. The punchthrough region is typically moderately doped with a dopant of a type opposite to that of the source/drain regions 105.
The gate electrode 103 is generally separated from the semiconductor substrate 101 by an insulating layer 109, typically an oxide layer such as SiO.sub.2. The insulating layer 109 is provided to prevent current from flowing between the gate electrode 103 and the source/drain regions 105 or channel region 107.
The source/drain regions 105, illustrated in FIG. 1, are lightly-doped-drain (LDD) structures. Each LDD source/drain structure includes a lightly-doped, lower conductivity region 106 near the channel region 107 and a heavily-doped, higher conductivity region 104 adjacent to the lower conductivity region 106 and typically connected to a source/drain terminal. Generally, the LDD source/drain structures are formed by implanting a first dopant into active regions adjacent the gate electrode 103 at relatively low concentration levels to form the lightly-doped regions 106; forming spacers 102 on sidewalls of the gate electrode 103; and implanting a second dopant into the active regions at higher concentration levels to form the heavily-doped regions 104. The substrate is typically annealed to drive the dopant in the heavily-doped regions deeper into the substrate 101.
Other types of semiconductor devices include source/drain regions without a lightly-doped region adjacent to the channel. These types of source/drain regions, referred to herein as non-LDD source/drain structures, are typically characterized as being relatively heavily doped throughout.
In operation, an output voltage is typically developed between the source and drain terminals. When an input voltage is applied to the gate electrode 103, a transverse electric field is set up in the channel region 107. By varying the transverse electric field, it is possible to modulate the conductance of the channel region 107 between the source region and the drain region. In this manner, an electric field controls the current flow through the channel region 107. This type of device is commonly referred to as a MOS field-effect-transistor (MOSFET). Semiconductor devices, like the one described above, are used in large numbers to construct most modern electronic devices.
In many instances, it may be useful to generate a variety of different MOS structures on a single substrate. For example, it may be desirable to form one or more active devices (e.g., transistors) with LDD source/drain structures and one or more active devices (e.g., transistors) with non-LDD source/drain structures on a common substrate. It may also be desirable to form active devices with different gate dielectrics. There is a need for the development of processes for forming semiconductor devices with different MOS structures on a single substrate.